Senior Electrical Engineer — PCB Design & Bring-Up (SafePointe Edge Systems)

SafePointe’s AI-powered, passive weapons-detection bollards run neural networks at the edge, fuse multiple sensing modalities, and must survive real-world deployment—from hospital entrances to stadiums. We’re seeking a Senior Electrical Engineer who can own hardware design end-to-end: architect and build boards from scratch, lead the full bring-up process, and drive production-ready reliability. 

 

Essential Duties / Responsibilities

 

Board Architecture & Schematic Design (end-to-end ownership)

  • Architect new mixed-signal embedded systems (power, sensing front-end, compute interfacing, comms, connectors) aligned with SafePointe performance and reliability targets.
  • Own schematic capture + component selection (availability, cost, lifecycle, derating) and define stack-up and critical constraints for layout.

PCB Layout Leadership (hands-on + oversight)

  • Drive PCB layout direction (Altium/KiCad or equivalent), including grounding strategy, return paths, isolation, connectorization, and noise/EMI control.
  • Lead design reviews and sign-off on layout quality (placement, routing, PDN, high-speed constraints, manufacturability).

Full Board Bring-Up & Debug (must-have)

  • Execute board bring-up from first power-on to full functional validation:
    • power sequencing, rails verification, clock/reset bring-up, firmware flashing paths
    • JTAG/SWD/UART/console access, boot diagnostics, boundary checks
    • subsystem validation (ADC/DAC, sensors, comms, storage, peripherals)
  • Build repeatable bring-up checklists, failure trees, and “known-good” reference measurements.

Signal/Power Integrity, Validation, and Correlation

  • Own power integrity (PDN impedance, ripple/noise, transient response) and signal integrity for relevant high-speed interfaces; translate results into actionable layout + design changes. 
  • Use simulation and lab correlation workflows (pre/post-layout) with industry toolchains (e.g., HFSS/ADS/Sigrity/SIwave class tools) as appropriate. 

Lab Measurement, Failure Analysis, and Reliability

  • Lead lab validation using oscilloscopes, VNAs, TDRs, spectrum analyzers, and related instrumentation; create detailed test plans and correlate with simulation. 
  • Drive root-cause analysis from bench to field: reproduce, isolate, fix, and prevent regressions.

DFM/DFT, Manufacturing Test, and Production Readiness

  • Ensure boards are manufacturable and testable: define DFM/DFT requirements, fixtures, boundary-access strategy, programming methods, and production test procedures.
  • Partner with manufacturing, suppliers, and contract manufacturers to transition designs to volume builds.

Cross-Functional Execution

  • Work tightly with firmware, mechanical, ML/edge, and field operations teams to deliver integrated systems that hit performance, cost, and reliability targets.

 

Minimum Qualifications

 

  • B.S. (or higher) in Electrical Engineering (or equivalent practical experience).
  • 8+ years professional experience designing and shipping embedded hardware products.
  • Demonstrated ownership of full PCB lifecycle: architecture → schematic → layout direction → bring-up → validation → production support.
  • Strong mixed-signal fundamentals (analog + digital), power design, grounding, and EMI/EMC awareness.
  • Proven track record of hands-on bring-up and debugging with lab equipment; strong documentation discipline.
  • Experience creating test plans and structured validation methods for hardware. 

Preferred Qualifications (highly valued)

  • SI/PI depth: experience with high-speed interfaces (e.g., PCIe/DDR/Ethernet/USB-class constraints), plus lab validation and correlation to simulation. 
  • Familiarity with SI/PI modeling toolchains (HFSS/ADS/Sigrity/SIwave or equivalents). 
  • Experience building automation scripts (Python/bash) for data collection, test orchestration, and analysis. 
  • Track record delivering products into manufacturing and improving field reliability through disciplined release and regression prevention practices. 
  • Prior work with ruggedized or safety-critical deployments (UL/FCC/CE, ISO 9001, or similar environments).

Travel: 15%

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