Uhnder has developed the world’s first automotive digital Radar on Chip (RoC).  Sensors based on Uhnder’s Digitally Coded Modulation (DCM) technology achieve new and unprecedented levels of performance for advanced driver assistance systems (ADAS) and autonomous driving solutions.  Founded in 2015, its main engineering operations center is in Austin, Texas, USA with design facilities in India and China.

As a Validation Engineering Manager, you will join a team of industry experts spanning mixed-signal, RF, digital, systems and software experts to develop the next generation of electronics surrounding us and impacting us in our everyday lives. 


Essential Functions

  • Lead post-silicon validation efforts for ROC products
  • Develop validation solutions for Radar on Chip mixed-signal SoCs and radar sensor modules
  • Analyze test results for accuracy and compliance with product specifications
  • Drive production readiness for Radar on Chip
  • Validate new designs with Design Engineering and fully characterize to RTP
  • Design test boards and drive layout as required
  • Participate in design reviews and drive DFM and DFT requirements
  • Collaborate with other technical and functional leaders to drive test planning, creation, and execution
  • Be a leader in driving issues and challenges as part of team mission
  • Develop and implement necessary processes for team
  • Grow team to meet increasing workloads


Required Education and Experience

  • BSEE or equivalent, MSEE preferred
  • At least 5 years of Management experience in complex silicon validation
  • Strong knowledge of digital SOC architectures and sub-systems
  • Strong Python and C programming skills
  • Experience planning and documenting test plans and results
  • Experience working under automotive quality and traceability requirements is preferred
  • Experience with lab equipment (power supplies, oscilloscopes, signal generators, etc.)
  • Strong hardware debugging skills
  • Ability to interpret PCB schematics and layouts
  • Understanding of silicon design fundamentals