Description:

Senior and Junior level ASIC Design Verification Engineer positions available in our growing HW Development group.

At Brainchip, we are revolutionizing Artificial Intelligence at the edge with our AkidaTM Hardware and Software products.

Join our team and contribute to the continued success of our Neural Networking Processors.

As a member of the verification team, you will be responsible that our designs meet the intended functional and performance specifications.

Mainly, you will be working on:

·       Pre-Silicon Design verification of next generation Spiking Neural Network IPs and SoCs, blocks and/or chip top-level.

·       Collaborate with other team members to define a verification methodology and a test plan.

·       Build self-checking test benches for SoC blocks and chip top-level verification.

·       Generate directed and random test cases, write regression scripts, and report code and functional coverage.

·       Do a first level debug for root cause classification (TB, HW, or SW issue), and work with design team to validate fixes or work-arounds.

·       Run Gate level simulations, and replicate Silicon/FPGA bugs in the test bench environment.

 

Requirements:

·       BS/MS in Electrical Engineering or related degree or certification required.

·       5+years of experience in System Verilog or UVM/OVM based verification

·       Strong skills in verification methodology, test planning, and test bench architecture

·       Very good experience with System Verilog and advanced verification techniques: constrained random verification, code/functional/assertion coverage.

·       Experience in integrating Verification IPs, and HW/SW Co-Simulation is a plus.

·       Knowledge of ARM based SoC architecture and system busses (AHB, AXI, APB) is strongly desired.

·       Knowledge of standard SoC interfaces (SPI, I2C, ect…) and high speed IO protocols (PCIe, USB, DDR) is a plus.

·       Programming skills in C++, Python, and shell scripting are strongly desired.

·       Good debugging skills, and well experienced with VCS/Verdi or similar toolsets.